Just a quick and dirty summary today

Progress Report of Region3


1) Frontend Electronics

Chris Cuevas and I discussed  how to multiplex the VDC signal after the discriminator (MAD chip).  Due to the characteristics of LVDS signals, a simple delay-line readout
scheme based on passive signal splitting and merging cannot be realized.  Chris and I are considering the usage of FPGA (programmable logic) based on a  wire number encoding
scheme that I  worked out some months ago, which does not require a delay-line.

Undergraduate student Graham and I will focus to develop a MAD evaluation board for characterizing the 600 MAD chips we ordered in December.
Unlike Bigbite where the MAD chips will be soldered directly on a board by a PCB company, we want to know the channel sensitivity, threshold scaling, timing etc ahead.

2) Geant4 Simulation

Changes and Updates:

- QweakSimG4 is now available via CVS  on JLab.
    At W&M I setup a graphical interface using ViewCVS where you can see the comments, changes,  and version number of the files.
    http://dogbert.physics.wm.edu/cgi-bin/viewcvs/viewcvs.cgi/QweakSimG4

- VDC: implemented stack of Stesalit frames, top and bottom aluminu sypport frame, realistic foil  stack
- VDC: is now sensitive to photon  hits (background caused mainly by the shielding wall)

- MainMagnet: Tedious implementation of the coil holders and support structure. Radial slabs attached to the upstream "spider" are missing.

  Pics of implementation:   http://dilbert.physics.wm.edu/elog/Software/223

- Rate estimation of electron and photon hits of the upstream VDC (= "Front VDC"), see here .

3) Wire Scanner

Joe Katich has stopped working for Qweak mid December, which means he is not continuing his wire scanner project. He will be involved in GeN (Hall A) or whatever crosses his mind.
The wire scanner is pretty much operational and is steered by a Labview GUI. An absolut position readout has been implemented and is accessable in the GUI.
However we have to perform a position calibration.

Graduate student Brian Hahn volunteered for some days to improve the optics before the semester started  yesterday, see here .

4)  Flatness Scanner for Stesalit frame (quality control)

Nice project for our undergraduate Brett Appleton, if he would only show up including for his project review .... at least we don't pay him.

The flatness scanner is an opto-electronic measuring system with laser diode collimator (flatbeam ®) and CCD line scan camera.
The laser diode collimator projects an exactly parallel beam, which is partially obscured by the measuring object. On a CCD line sensor, a shadow boundaries is
produced directly and without intermediate imaging.



More about it in the next tracking report

 

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